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TCF6000 Peripheral Clamping Array
The TCF6000 was designed to protect input/output lines of microprocessor systems against voltage transients.
* * * * *
PERIPHERAL CLAMPING ARRAY
SEMICONDUCTOR TECHNICAL DATA
Optimized for HMOS System Minimal Component Count Low Board Space Requirement No P.C.B. Track Crossovers Required Applications Areas Include Automotive, Industrial, Telecommunications and Consumer Goods
D SUFFIX PLASTIC PACKAGE CASE 751 (SO-8)
8 1
NO SUFFIX PLASTIC PACKAGE CASE 626
Figure 1. Representative Block Diagram and Simplified Application
VDD VRef Generator Pin Gnd Each Cell Gnd
PIN CONNECTIONS
Gnd 1 VCC VRef Clamp 2 Clamp 3 Clamp 4
8 VCC 7 Clamp 6 Clamp 5 Clamp
Digital Inputs Micro Computer Analog Inputs Rin Device TCF6000D TCF6000
ORDERING INFORMATION
Operating Temperature Range TA = - 40 to +85C Package SO-8 Plastic DIP
Rev 0
Cin Gnd
(c) Motorola, Inc. 1996
MOTOROLA ANALOG IC DEVICE DATA
1
TCF6000
MAXIMUM RATINGS (TA = 25C, unless otherwise noted, Note 1.)
Rating Supply Voltage Supply Current Clamping Current Junction Temperature Power Dissipation (TA = + 85C) Thermal Resistance (Junction-Ambient) Operating Ambient Temperature Range Storage Temperature Range
NOTE: 1. Values beyond which damage may occur.
Symbol VCC Ii IIK TJ PD JA TA Tstg
Value 6.0 300 50 150 400 100 -40 to +85 -55 to + 150
Unit V mA mA C m/W C/W C C
ELECTRICAL CHARACTERISTICS (TA = 25C, 4.5 VCC 5.5 V, unless otherwise noted.)
Characteristics Positive Clamping Voltage (Note 2) (IIK = 10 mA, -40C TA + 85C) Positive Peak Clamping Current Negative Peak Clamping Voltage (IIK = -10 mA, -40C TA + 85C) Negative Peak Clamping Current Output Leakage Current (0 V Vin VCC) (0 V Vin VCC, -40C TA + 85C) Channel Crosstalk (ACT = 20 log IL/IIK) Quiescent Current (Package)
NOTE: 2. The device might not give 100% protection in CMOS applications.
Symbol V(IK) IIK(P) V(IK) IIK(P) IL ILT ACT IB
Min - - -0.3 -20 - - 100 -
Max VCC + 1.0 20 - - 1.0 5.0 - 2.0
Unit V mA V mA A
dB mA
CIRCUIT DESCRIPTION
To ensure the reliable operation of any integrated circuit based electronics system, care has been taken that voltage transients do not reach the device I/O pins. Most NMOS, HMOS and Bipolar integrated circuits are particularly sensitive to negative voltage peaks which can provoke latch-up or otherwise disturb the normal functioning of the circuit, and in extreme cases may destroy the device. Generally the maximum rating for a negative voltage transients on integral circuits is -0.3 V over the whole temperature range. Classical protection units have consisted of diode/resistor networks as shown in Figures 2a and 2b. The arrangement in Figure 2a does not, in general, meet the specification and is therefore inadequate. The problem with the solution shown if Figure 2b lies mainly with the high current drain through the biassing devices R1 and D3. A second problem exists if the input line carries an analog signal. When Vin is close to the ground potential, currents arising from leakage and mismatch between D3 and D2 can be sourced into the input line, thus disturbing the reading. Figure 2. Classical Protection Circuits (a)
VCC Vin Rin C D2 Cin Cin D2 D3 Gnd Gnd R1
(b)
VCC D1 C
D1 Vin Rin
Figure 3 shows the clamping characteristics which are common to each of the six cells in the Peripheral Clamping Array. As with the classical protection circuits, positive voltage transients are clamped by means of a fast diode to the VCC
supply line.
2
MOTOROLA ANALOG IC DEVICE DATA
TCF6000
Figure 3. Clamping Characteristics
IIK +10 mA
APPLICATIONS INFORMATION
Figure 4 depicts a typical application in a microcomputer based automotive ignition system. The TCF6000 is being used not only to protect the system's normal inputs but also the (bidirectional) serial diagnostics port. The value of the input resistors, Rin, is determined by the clamping current and the anticipated value of the spikes.
-0.3 V
0V
VCC VCC+ 0.75 V Typ
Vin
Thus: Rin = where: V IIK
-10 mA Low Impedance High Impedance Low Impedance
V = Peak Volts (V) IIK = Clamping current (A) So, taking, V = 300 V typically (SAE J1211) IIK = 10 mA (recommended) Rin = 30 k gives, Resistors of this value will not usually cause any problems in MOS systems, but their presence needs to be taken into account by the designer. Their effect will normally need to be compensated for Bipolar systems.
Figure 4. Typical Automotive Application
VCC TCF6000
Gnd
Gnd
Vbat Hall Effect Pick Up Vbat Engine Temperature Pressure Sensor Gnd Battery Volts 6X Rin Gnd 3X Cin RHall INT1 D1
VCC B0 D6 MC6805S2 D0 D2 VSS Gnd Serial Diagnostics B1 B2 Coil Drive
Coil Feedback
Car
Ignition Module
MOTOROLA ANALOG IC DEVICE DATA
3
TCF6000
The use of Cin is not mandatory, and is not recommended where the lines to be protected are used for output or for both input and output. For digital input lines, the use of a small capacitor in the range of 50 pF to 220 pF is recommended as this will reduce the rate of rise of voltage seen by the TCF6000 and hence the possibility of overshoot. In the case of the analog inputs, such as that from the pressure sensor, the capacitor Cin is necessary for devices such as the MC6805S2 shown, which present a low impedance during the sampling period. The maximum value for Cin is determined by the accuracy required, the time taken to sample the input and the input impedance during that time, while the maximum value is determined by the required frequency response and the value of Rin. Thus for a resistive input A/D connector where: Ts = Sample time (seconds) RD = Device input resistance () Vin = Input voltage (V) k = Required accuracy (%) Q1 = Charge on capacitor before sampling Q2 = Charge on capacitor after sampling ID = Device input current (A) Thus: but, and, so that, and, Q1-Q2 = kQ1 100
Q1= Cin Vin Q1-Q2= ID * Ts ID Ts = k * Cin-Vin 100
ID * Ts Cin (min) = Farad Vin * k Cin (min) = 100 * Ts Farad k * RD
so,
The calculation for a sample and hold type converter is even simpler: k = Required accuracy (%) CH = Hold capacitor (Farad) Cin (min) = 100 * CH Farad k 100.25 pF = 10 nF for 1/4% accuracy 0.25
For the MC6805S2 this comes out at: Cin (min) =
4
MOTOROLA ANALOG IC DEVICE DATA
TCF6000
OUTLINE DIMENSIONS
8 5
PLASTIC PACKAGE CASE 626-05 ISSUE K -B-
1
4
NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --- 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --- 10_ 0.030 0.040
F
NOTE 2
-A- L
C -T-
SEATING PLANE
J N D K
M
M
H
G 0.13 (0.005) -A-
8 5
TA
M
B
M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.18 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.189 0.196 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.007 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
-B-
1 4
4X
P 0.25 (0.010)
M
D SUFFIX PLASTIC PACKAGE CASE 751-05 (SO-8) ISSUE N B
M
G C -T-
8X SEATING PLANE
R
X 45 _
F
D 0.25 (0.010)
M
K TB
M_
S
J
S
A
MOTOROLA ANALOG IC DEVICE DATA
5
TCF6000
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JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
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*TCF6000/D*
MOTOROLA ANALOG IC DEVICE DATA TCF6000/D

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